About GlobalFoundriesGlobalFoundries (GF) is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world’s most inspired technology companies. With a global manufacturing footprint spanning three continents, GF makes possible the technologies and systems that transform industries and give customers the power to shape their markets. For more information, visit www.gf.comAbout The JobWe are seeking a highly skilled MTS Digital Design Engineer to join GlobalFoundries Egypt digital design team. The ideal candidate will lead the architecture, design, and implementation of complex digital systems. This role requires deep expertise in RTL design, microarchitecture, and system integration, along with the ability to drive technical direction across cross-functional teams. The candidate will also play a key role in developing high-performance, low-latency digital designs for advanced high-speed data paths used in modern optical transceivers.Key ResponsibilitiesLead end-to-end digital design from microarchitecture definition through RTL implementation and integrationArchitect and implement high-speed data path logic for high speed systems, including components used in optical transceiver pipelineDefine and review microarchitecture specifications with emphasis on throughput, latency, and timing closureDrive design quality through code reviews, linting, CDC/RDC, and synthesis best practicesCollaborate with system, analog/mixed-signal, and physical design teams to ensure seamless integration of high-speed interfaces.Optimize designs for performance, power, and area (PPA)Debug complex functional and integration issues across simulation, emulation, and silicon bring-upRequired QualificationsBachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field10+ years of experience in digital design and RTL development.Strong expertise in Verilog/SystemVerilog and digital design fundamentalsSolid understanding of: Microarchitecture design, Clock domain crossing (CDC), and reset domain crossing (RDC)Low-power design techniquesSynthesis and timing constraintsExperience with industry-standard EDA tools (e.g., synthesis, lint, CDC, simulation).Strong debugging and problem-solving skills.Preferred QualificationsFamiliarity with system-level design and hardware/software co-designKnowledge of DFT (scan, MBIST, JTAG) and bring-up flowsExperience with FPGA prototyping and emulation platformsScripting experience (Python, Tcl, or similar)We offer Base SalaryEquityAnnual Bonus PlanMedical InsuranceInformation about our benefits you can find here: https://gf.com/careers/opportunities-in-europe/